From my review published in Chip Design Magazine the October/November 2007 issue:
The advice and methodology contained in this conversational book on design verification would've saved my last chip-design project man-years of agony. They also would have improved our chances of achieving first-pass success. To explain quickly, the volume's pages are sprinkled with many figures, charts, tables, and pseudocode. Metric-driven process automation (MPA) is introduced and detailed as both a methodology and tool-flow issue that combine to bring the discipline of measurement into design verification. "You can only improve what you can measure" really rings true here.
Most design and verification teams have some sort of best practices in place to help guide their processes. I found that this book embodies a way for these teams to define and communicate how they'll measure success even before one line of software is written or any HDL code is simulated. The authors present an intuitive process model with four sequences: plan, execute, measure, and respond. This model is emphasized throughout the book as each new concept is introduced.
I enjoyed reading through the four major parts of the book starting with an executive's guide, which helps to define all of the specific roles in a company that are needed to create a new electronic system. Although modern verification tool technologies were introduced with a tendency to mention Cadence tools and the e language, the concepts also will work with popular tools from Mentor, Synopsys, and other vendors.
In the second part of the book, I learned more about how the verification process should be managed, how measurements for project completion could be defined, and how having metrics would improve my electronic design process. A big benefit to automating metrics is that anyone on the project team can get quick insight into how close to completion the verification tasks are. They also can see which blocks, modules, or interfaces are causing a schedule issue. Verification metrics are automatically extracted from any EDA tool result. As a result, the reporting mechanism becomes transparent instead of adding another manual chore.
The authors are pragmatic enough to point out the downside of collecting too many metrics, such as slower simulation speeds. Each team will therefore have to make tradeoffs for tasks like regression test coverage versus run times.
Part three provides guidelines on how to implement or execute the verification process in even more detail than the first two parts of the book. Verification processes are shown for multiple levels of abstraction including: transaction-level modeling, programmer's view, cycle accurate, and register transfer level (RTL). The importance of assertion-based verification is emphasized again in this part, which also contains a healthy discussion of who gets to write assertions (verification or design engineers) and when to use dynamic or formal techniques.
Chapter 15 on System Verification resonated with me because I've used consumer products that simply locked up and required a reset to start working again. Using an example with an ARM processor and AHB interface, co-verification is discussed as a means to avoid corner-case system bugs early on between hardware and software.
Analog/mixed-signal (AMS) verification is addressed with specific reference to the Yogitech tools in Chapter 16. The same discipline applied to the digital domain of design verification also can be used with AMS designs (random-constrained stimuli, self-checking, and functional coverage). In the fourth part of this book, I read real stories and confessions about both verification failures and lessons learned from notable companies like Freescale Semiconductor, Cisco Systems, Siemens AG, Genesis Microchip, NXP Semiconductor, and STMicroelectronics.
I recommend this book to multiple members of your team: system architects, verification engineers, design engineers, firmware engineers, and even application engineers and marketing. They will all benefit from understanding their roles in the design verification process and how using metric-driven process automation will aid their communication, improve the quality of their design, and help in the achievement of first-pass system success.
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